XOR multiplexing technique for nanocomputers

Yu, Lianhua, Diao, Ming, Chen, Xiaobo and Cheng, Xiaochun ORCID logoORCID: https://orcid.org/0000-0003-0371-9646 (2020) XOR multiplexing technique for nanocomputers. Applied Sciences, 10 (8) , e2825. ISSN 2076-3417 [Article] (doi:10.3390/app10082825)

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In emerging nanotechnologies, due to the manufacturing process, a significant percentage of components may be faulty. In order to make systems based on unreliable nano-scale components reliable, it is necessary to design fault-tolerant architectures. This paper presents a novel fault-tolerant technique for nanocomputers, namely the XOR multiplexing technique. This hardware redundancy technique is based on a numerous duplication of faulty components. We analyze the error distributions of the XOR multiplexing unit and the error distributions of multiple stages of the XOR multiplexing system, then compare them to the NAND multiplexing unit and the NAND multiplexing multiple stages system, respectively. The simulation results show that XOR multiplexing is more reliable than NAND multiplexing. Bifurcation theory is used to analyze the fault-tolerant ability of the system and the results show that XOR multiplexing technique has a high fault-tolerant ability. Similarly to the NAND multiplexing technique, this fault-tolerant technique is a potentially effective fault tolerant technique for future nanoelectronics.

Item Type: Article
Keywords (uncontrolled): nanoelectronic circuit, fault tolerant, XOR multiplexing technique, bifurcation analysis
Research Areas: A. > School of Science and Technology > Computer Science
Item ID: 29721
Notes on copyright: © 2020 by the authors. Licensee MDPI, Basel, Switzerland. This article is an open access article distributed under the terms and conditions of the Creative Commons Attribution (CC BY) license.
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Depositing User: Jisc Publications Router
Date Deposited: 23 Apr 2020 12:41
Last Modified: 24 Oct 2022 11:16
URI: https://eprints.mdx.ac.uk/id/eprint/29721

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