A hardware accelerated semi analytic approach for fault trees with repairable ccmponents.

Kara-Zaitri, Chakib and Ever, Enver (2009) A hardware accelerated semi analytic approach for fault trees with repairable ccmponents. In: Computer Modelling and Simulation, 2009. UKSIM '09. 11th International Conference. IEEE, pp. 146-151. ISBN 9781424437719

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Abstract

Fault tree analysis of complex systems with
repairable components can easily be quite complicated
and usually requires significant computer time and
power despite significant simplifications. Invariably,
software-based solutions, particularly those involving
Monte Carlo simulation methods, have been used in
practice to compute the top event probability.
However, these methods require significant computer
power and time. In this paper, a hardware-based
solution is presented for solving fault trees. The
methodology developed uses a new semi analytic
approach embedded in a Field Programmable Gate
Array (FPGA) using accelerators. Unlike previous
attempts, the methodology developed properly handles
repairable components in fault trees. Results from a
specially written software-based simulation program
confirm the accuracy and validate the efficacy of the
hardware-oriented approach.

Item Type: Book Section
Additional Information: Conference held in Cambridge, 25th-27th May, 2009
Research Areas: A. > School of Science and Technology > Computer Science > SensoLab group
A. > School of Science and Technology > Computer and Communications Engineering
Item ID: 6947
Useful Links:
Depositing User: Dr. Enver Ever
Date Deposited: 01 Feb 2011 11:48
Last Modified: 13 Oct 2016 14:22
URI: http://eprints.mdx.ac.uk/id/eprint/6947

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